1. Field of the Invention
This invention relates to electronic circuits, and more particularly, to the selection of flop circuits in an integrated circuit design.
2. Description of the Related Art
Integrated circuits (ICs) may utilize a wide variety of different types of storage circuits. Commonly used storage circuits include master-slave flip-flops and latch circuits. Flip-flops and latches may be widely used to provide temporary storage of data states in an IC, e.g., for storing a state of a signal in transit between a first block of combinational logic and a second block of combinational logic.
Another type of storage circuit used in ICs is a pulse flop. A pulse flop may be formed by converting a single latch circuit to perform a flip-flop function using a pulse clock having a duty cycle of less than 50%. When the pulse clock is asserted (e.g., high), the pulse flop may be transparent, and thus a logic value on an input may be received and propagated to an output. When the pulse clock is not asserted (e.g., low), the logic value input may be blocked from propagating to the output, with the previously input logic value being stored.
The different operational characteristics of flip-flops and pulse flops may make them suitable for certain uses in an IC, but may also give rise to certain limitations. For example, while some pulse flop designs may be suitable for high-speed signal paths, they can also be subject to a race condition known as the min-time problem, wherein a signal may propagate through two or more serially coupled pulse flops when both are in their transparency phase (e.g., when the pulse is asserted). This can cause erroneous operation of the IC. Flip-flops are typically not subject to this condition since the master and slave portions may be transparent during different phases of the clock signal. However, flip-flops are typically not as fast as pulse flops.
During the design of an IC, many different simulations may be performed to determine where flip-flops, pulse flops, and latches should be implemented. Based on the simulations, the selected circuits may be placed at corresponding locations in the IC layout. The IC may be subsequently be implemented in silicon and tested. During the testing of the IC design, it is possible that some of the selected flip-flops and/or pulse flops may fail due to various reasons. This may necessitate a redesign of the IC, which may include changing its layout. However, such a redesign/layout change, particularly after the original design has been implemented in silicon, can be expensive and time consuming, and can further impact time to market. To prevent such an occurrence, a more conservative design approach may be taken. However, such an approach may sacrifice performance.